The present disclosure relates to memory card controllers for controlling access to a memory card, and host devices including the memory card controller.
A conventional memory card includes a first group of pins and a second group of pins. The first pin group includes nine pins which are arranged in a line at a deeper end portion of the memory card in a direction in which the memory card is inserted into a memory card connector, and function as pins for parallel signal transfer in the normal transfer mode. The second pin group is used only in the high-speed transfer mode, and includes at least seven pins including at least two pair of data pins for differential serial signal transfer. In the high-speed transfer mode, two pins of the first pin group function as a pair of pins for transferring differential clock signals (see Japanese Unexamined Patent Publication No. 2011-28433).
As a standard for a secure digital (SD) card, which is a type of memory card, for example, ultra high Speed-II (UHS-II) is known, which is a high-speed differential interface standard which specifies high-speed data transfer having a maximum rate of 312 MB/s.